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revision 1.8, 15-feb-05 page 1 of 30 features - extremely accurate, surpassing the accuracy requirements of the iec 1036 specification less than 0.1% error over a 600 : 1 dynamic range - on-chip programmable current input gain suitable for use with low-resistance shunt resistor or current transformer - on-chip programming for output pulse rate selection - on-chip calibration eliminates the need for an external resistor network or trim-potentiometer - programmable on-chip creep prevention under no-load condition - all on-chip programmable functions may be reprogrammed a second time - outputs directly drive an electromechanical counter or counters with a two phase stepper motor and consumption led indicator - fast calibration pulse output for high speed manual or automated calibration - on-chip voltage reference and power supply monitoring - bi-directional or unidirectional energy measurement, with direction indication output available description the as8118 is a very accurate single-phase bi-directional instantaneous energy measurement integrated circuit, which surpasses all the accuracy requirements for iec1036 alternating current static watt-hour meters. the measured energy is converted into pulses with the number of output pulses being proportional to the measured energy. the as8118 is ideal for use in ?stand alone? kwh meter applications, where the ic directly drives an electromechanical counter with a two-phase stepper motor, or for more complex meter applications, the as8118 interfaces directly to a micro-controller. the highly integrated as8118 design includes all the required functional blocks. the blocks comprise of analog to digital converters (adc) for the voltage and current channels, digital filters, a digital signal processing block, a control block and non-volatile calibration memory for the on-chip programming. the on-chip programming enables the setting of the current input gain, the anti-creep threshold, the output pulse rates and the system calibration. the high level of integration ensures a minimum number of non-critical external components are required. the on-chip anti-creep circuit ensures that the as8118 does not output pulses when the meter is in a no-load condition and that the iec1036 anti-creep test requirements are fully complied with, for both direct or transformer connection meters. the as8118 offers three different pulse outputs. a stepper motor drive output for directly driving a stepper motor display, a led output for energy consumption indication and a dedicated high frequency output for fast single point system calibration. the as8118 is available in either surface mount soic-18 or dual-in-line dip-18 packages. block diagram ? -mod vref digital filter control power calculation cal vssd vddd ip vp ? -mod crystal osc non-volatile calibration prog vssa vdda tm xin xout diri diro por agnd buffer in led digital filter mon mop vn figure 1 block diagram of the as8118 as8118 single phase instantaneous energy metering ic with on-chip calibration, stepper motor drive and led output data sheet
data sheet as8118 revision 1.8, 15-feb-05 page 2 of 30 typical connection circuit vss voltage regulator vdd (5v) vss l n load shunt vdda vddd ip vssa vssd in vn vp xin xout calibration pulse output calibration programming vdd (5v) prog tm led cal diri diro mop stepper motor outputs mon led output figure 2 typical connection circuit for the as8118 pin configuration 1 8 7 6 5 4 3 2 15 14 13 12 11 16 10 9 in 18 17 vp vn tm vssa prog vssd diro cal mop vddd xout xin vdda diri ip mon led figure 3 pin configuration of the as8118
data sheet as8118 revision 1.8, 15-feb-05 page 3 of 30 pin description pin no. pin name description 1 vp positive input for the voltage channel. vp is a differential input with vn. the differential voltage should be set at 150mv peak for rated voltage conditions. vp is an analog input pin. 2 vn negative input for the voltage channel. vn is a differential input with vp. vn is usually tied to 0v potential (vssa). vn is an analog input pin. 3 tm on ?power up?, the test mode input defines the operation mode of the device. either ?normal operation?, or ?calibration? modes may be selected. tm has an on-chip pull down resistor and should be left unconnected during ?normal operation?. tm must be set to logic ?1? at ?power up? to set the device in ?calibration? mode. 4 vssa negative analog supply. vssa is the ground reference for the analog circuitry. 5 prog programming pin for calibration procedure. prog is an analog input pin which must be left unconnected during normal operation. note: prog must not be connected to vss. 6 vssd negative digital supply. vssd is the ground reference for the digital circuitry. 7 diro direction output provides indication of the direction of current flow through the current sensor. this digital input/output has an on-chip pull down resistor and provides logic ?0? for positive power and logic ?1? for negative power. diro is used as an input during the programming cycle. this output may be directly connected to a led and is capable of driving 4ma. 8 cal fast energy pulse output for calibration. cal pulse rate is programmable and dependent upon the selected mon/mop frequency. 9 mop positive motor drive signal. mop and mon are low frequency outputs for directly driving a two phase stepper motor. the frequency of the mop/mon outputs is programmable to suite all industry standards and is capable of driving 10ma. 10 mon negative motor drive signal. mon and mop are low frequency outputs for directly driving a two phase stepper motor. the frequency of the mop/mon outputs is programmable to suite all industry standards and is capable of driving 10ma. 11 led this output may be connected to an led to display energy consumption. led is a digital output, which is programmable to a desired pulse rate. all the industry standard pulse rates are available. this output is capable of driving 10ma. 12 vddd positive digital supply. vddd provides the supply voltage for the digital circuitry. the required supply voltage is 5v 10%. 13 xout see xin below, for the connection of a crystal or ceramic resonator. when an external clock is applied to xin, xout is not connected. 14 xin a 3.579545 mhz crystal or ceramic resonator may be connected across xin and xout without the need for external load capacitors. alternatively, an external clock signal may be applied to xin. 15 vdda positive analog supply. vdda provides the supply voltage for the analog circuitry. the required supply voltage is 5v 10%. 16 diri direction input pin for selecting unidirectional or bi-directional energy measurement mode. when diri is at logic ?0?, the ic is set in unidirectional mode. when diri is at logic ?1? the ic is in bi- directional mode. in default mode, when diri is not connected, the ic is in bi-directional mode. diri is a digital input with an on-chip pull-up resistor. 17 ip positive input for the current channel. ip is a differential input with in. the input gain is programmable depending on the desired current sensor. the maximum differential voltage is 150mv peak (gain = 4). ip is an analog input pin. 18 in negative input for the current channel. in is a differential input with ip. the input gain is programmable depending on the desired current sensor. in is usually at 0v potential. in is an analog input pin.
data sheet as8118 revision 1.8, 15-feb-05 page 4 of 30 as8118 performance graphs -0,8 -0,6 -0,4 -0,2 0 0,2 0,4 0,6 0,8 0,01 0,1 1 10 100 i [a] error [%] gain 20 gain 4 gain 16 graph 1: error as a % of reading for gain settings 4, 16 and 20 at 25 c -0,8 -0,6 -0,4 -0,2 0 0,2 0,4 0,6 0,8 0,01 0,1 1 10 100 i [a] error [%] - 40c + 85c + 25c graph 2: error as a % of reading at temperature limits and pf = 1 -0,8 -0,6 -0,4 -0,2 0 0,2 0,4 0,6 0,8 0,01 0,1 1 10 100 i [a] error [%] + 85c - 40c + 25c graph 3: error as a % of reading at temperature limits and pf = 0.8 -0,8 -0,6 -0,4 -0,2 0 0,2 0,4 0,6 0,8 0,01 0,1 1 10 100 i [a] error [%] - 40c + 85c + 25c graph 4: error as a % of reading at temperature limits and pf = 0.5 -0,8 -0,6 -0,4 -0,2 0 0,2 0,4 0,6 0,8 0,01 0,1 1 10 100 i [a] error [%] vdd_4.5v vdd_5.0v vdd_5.5v graph 5: error as a % of reading with variation in vdd -0,8 -0,6 -0,4 -0,2 0 0,2 0,4 0,6 0,8 0,01 0,1 1 10 100 i [a] error [%] v_main_184 v_main_264.5 v_main_230 graph 6: error as a % of reading with mains voltage variation
data sheet as8118 revision 1.8, 15-feb-05 page 5 of 30 -0,8 -0,6 -0,4 -0,2 0 0,2 0,4 0,6 0,8 f [hz) error [%] 45 50 55 65 60 graph 7: error as a % of reading with mains frequency variation functional description the as8118 is a cmos mixed signal integrated circuit that measures electrical power over a dynamic range of 600:1, to an accuracy of better than 0.1%. the as8118 comprises of standard functional blocks including two sigma/delta modulators, which convert the analog voltage and current input signals into digital signals. the voltage and current signals are then digitally filtered, which eliminates offsets thus enabling a single point calibration cycle. a power calculation block calculates the active energy value. an on-chi p voltage reference ( 30ppm/k typical), oscillator and non-volatile calibration registers and control block for programming the as8118 completes the core functional elements. programming of the as8118 enables the device to be configured to suite the users specific input and output requirements and allows for fast and efficient calibration. the as8118 device provides the user with two complete opportunities to programme the device. the following parameters may be programmed via the on-chip non-volatile memory: - current channel input gain - calibration pulse output frequency - stepper motor output drive frequency - led output frequency - anti-creep threshold - calibration constant a detailed description of the versatility of the as8118 is given below. current inputs for energy calculation the current channel input consisting of inputs ip and in is differential and connected to a low resistance shunt or current transformer, in series with the load. the current input signal level may be programmed by means of an on-chip programmable gain amplifier (pga). the gain is selected through the programming of 2 bits in the on-chip memory as follows: parameter: gain setting voltage gain input voltage comments 1 1 20 -30mv peak v ip 30mv peak shunt mode 1 0 0 1 16 -38mv peak v ip 38mv peak ct mode 0 0 4 -150mv peak v ip 150mv peak ct mode
data sheet as8118 revision 1.8, 15-feb-05 page 6 of 30 for optimum operating conditions, the input signal at the maximum current (i max ) condition should be set at 30mv peak, when the input gain = 20, or 150mv peak, when the input gain = 4. the default gain, namely the as8118 setting which is available without any programming required, is gain = 20. the value of an ideal shunt resistor, may be calculated as follows: assuming an i max rating of 60a (rms) 84.85a (peak), then a shunt value of 350 ? would be suitable. ? = = 350 85 84 30 peak peak shunt a . mv r the mains current is sampled at 1.7478khz, assuming that the recommended crystal oscillator frequency of 3.5795mhz, is used. voltage input for energy calculation the voltage channel input consists of inputs vp and vn, which are is differential, with vp connected to the tap of a resistor divider circuit of the line voltage and vn connected to ground. for optimum operating conditions, the input signal at vp with respect to vn, should be set at 150mv peak for the rated line voltage condition. the maximum voltage on vp for the specified operation is 210mv with respect to vss. the maximum allowed voltage signal at vp, which ensures that pulses are still provided at the output, is 300mv with respect to vss. both vp and vn have internal esd protection and an over-voltage of 7v can be sustained on these pins without risk of permanent damage to the device. the resistor values for an ideal voltage divider, may be calculated as follows: assuming a v mains of 230v (rms) 325v (peak) and according to the voltage divider shown below, the value for r2 = 820 ? , the value of r1a+r1b may be calculated as follows: v mains r1a+r1b r2 v in ? = ? ? = ? = + m . mv mv v * v ) v v ( * r b r a r max ip max ip ) peak ( mains 77 1 150 150 325 820 2 1 1 the mains voltage is sampled at 1.7478khz, assuming that the recommended crystal oscillator frequency of 3.5795mhz is used.
data sheet as8118 revision 1.8, 15-feb-05 page 7 of 30 digital filters the current and voltage channels have been identically implemented with digital high pass filters in both channels, thus eliminating offsets. the filters ensure that there are no phase errors introduced between the voltage and current channels, enabling single point calibration. energy to pulse output conversion the energy value is accumulated in the energy accumulator and compared with the default or programmed threshold level, following each sample. the threshold represents the pulse equivalent energy value . if the energy value goes above the threshold, a pulse is generated and presented to the output. each time a pulse is generated the threshold value is subtracted from the contents of the energy accumulator. the remaining energy, namely the energy value above the threshold value is retained in the accumulator. further measured energy is added to the retained value in the accumulator and a pulse is again generated and presented to the output, when the value again exceeds the threshold value. thus no energy is lost during the energy to pulse output conversion process. the voltage and current signals are sampled at 1.7478khz. the sample rate is derived from the main clock (f mclk ) as follows: 3.57945 mhz / 8*256 = 1.7478 khz the number of measured harmonics is defined by the sample rates of the voltage and current input signals. the maximum bandwidth, which is half the sample frequency, is calculated as follows: 1.7478/2 khz = 873.9 hz thus, depending on the mains frequency, the measured energy is up to the following harmonics: 50hz mains = 17th harmonic 60hz mains = 14th harmonic energy pulse outputs the as8118 has three different pulse outputs. all the outputs are derived directly from the measured energy; thus, the outputs can be used for energy accumulation and for calibration purposes. the output options include the following: - cal: a higher pulse rate output for fast calibration - mop/mon: low pulse rate outputs for directly driving a stepper motor - led: a low pulse rate output which may be used to directly drive a led for displaying power consumption calibration pulse output (cal): the cal output is a high frequency output, the frequency of which is proportional to the real power measured. the output pulse rate is programmable via the on-chip memory and allows for 4 pulse rate options: parameter: f_cal_sel setting cal output pulse rate 00 mon/mop x 8 01 mon/mop x 16 10 mon/mop x 32 11 mon/mop x 64
data sheet as8118 revision 1.8, 15-feb-05 page 8 of 30 the default pulse rate of cal is mon/mop x 16. the default pulse rate is the pulse rate available at the output, without any programming required to the as8118. (note: as the default pulse rate of mon/mop is 400 imp/kwh, the actual cal default pulse rate is 400 x 16 = 6,400 imp/kwh) as an example, the maximum selectable pulse rate of cal is 64 * 800 = 51,200 imp/kwh (see mon/mop below) the cal pulse width is fixed at 1ms and is shown in the timing diagram and timing parameter s that follow. stepper motor drive outputs (mon & mop): the mon and mop outputs may be used to directly drive an electromechanical counter or a stepper motor counter. the output frequencies are proportional to the real power measured. the required format of the signal for driving a mechanical counter, activated by a 2-phase stepper motor is provided by the difference between the mon and mop outputs. the output pulse rate is programmable via the on-chip memory, with 4 pulse rate options being available: parameter: f_mon_sel setting mon/mop output pulse rate 00 100 imp/kwh 01 200 imp/kwh 10 400 imp/kwh 11 800 imp/kwh the default mon/mop pulse rate is set at 400 imp/kwh. the default pulse rate is the pulse rate available at the output, without any programming required to the as8118. the mon and mop outputs shown in figure 4 are capable of driving 10ma at v oh = 4.0v and v ol = 0.4v. the widths of the mon/mop pulses are 200ms for all settings up to 800imp/kwh. above 800imp/kwh, the mon/mop pulse widths maintain a constant 50% duty cycle and is shown in the timing diagram and timing parameters that follows. led driver pulse output (led): the led output is a low frequency output, the frequency of which is proportional to the real power measured. the pulse rate is programmable via the on-chip memory the selected pulse rate is independent of the settings of both the selected cal and the mon/mop settings. parameter: f_led_sel setting led output pulse rate 000 100 imp/kwh 001 200 imp/kwh 010 400 imp/kwh 011 800 imp/kwh 100 1600 imp/kwh 101 3200 imp/kwh 110 6400 imp/kwh the default led pulse rate is set at 3200 imp/kwh. the default frequency is the frequency available at the output, without any programming required to the as8118. the led output is capable of driving 10ma at v oh = 4.0v and v ol = 0.4v. the width of the led pulse is 80 ms for all settings except where the led stream is shorter than 160ms. in this case, a 50% duty cycle is maintained. the format of the led signal is shown in the timing diagram and timing parameters below.
data sheet as8118 revision 1.8, 15-feb-05 page 9 of 30 anti-creep threshold setting the anti-creep threshold is programmable to ensure that the set threshold lies between the anti-creep current, a current level at which no pulses must be generated and the start current. the programmable threshold levels have been set to accommodate the various specified base currents (i b ) of the meter and if the meter is direct connection (shunt resistor) or connection is through a current transformer. the formulae for calculating the appropriate thresholds are as follows: shunt: 5 1 5 1 1000 4 * i * i * th _ ac start b = = current transformer: 5 1 5 1 1000 2 * i * i * th _ ac start b = = parameter: acreep_sel (all values are given in ma, unless otherwise specified) setting i threshold i b (a) i max (a) (i b *4) i max (a) (i b *6) i anticreep shunt i starting shunt i anticreep ct i starting ct 2.3 1.5 6 9 1.2 6 0.6 3 00 2.3 2.5 10 15 2 10 1 5 01 7.4 5 20 30 4 20 2 10 14.8 10 40 60 8 40 4 20 10 14.8 15 60 90 12 60 6 30 29.7 20 80 120 16 80 8 40 11 29.7 30 120 n/a 20 100 10 50 the default anti-creep threshold (ac_th) is set at 7.4ma, best suited to a 30a (ib*6) or 20a (ib*4) meter. the default anti- creep is the programmed threshold setting, without any programming required to the as8118. summary of programmable parameters the as8118 programming options, along with the default settings have been summarised in the table below: i gain cal mon/mop led anti-creep threshold 20 8 100 100 2.32ma 16 16 200 200 7.43ma 432 400 400 14.90ma 64 800 800 29.70ma 1600 3200 6400 note: the default settings have been highlighted.
data sheet as8118 revision 1.8, 15-feb-05 page 10 of 30 timing diagram mon mop cal led t1 t4 t3 t2 t5 t6 figure 4 timing diagram for as8118 frequency outputs timing parameters parameter values unit pulse rate comments t1 200 ms 100,200,400 imp/kwh for all currents up to 120a ; 230v 200 ms 800 imp/kwh i max < 97.8 a ; 230 v 50% duty cycle 800 imp/kwh i max > 97.8 a ; 230 v t2 tosc*4 ms minimum time between mon and mop t3 t1+t2 ms 100,200,400,800 imp/kwh t4 2 * t3 ms 50,100,200,400 imp/kwh t5 1 ms t6 80 ms 100,200,400,800 imp/kwh for all currents up to 120a ; 230v 80 ms 1600 imp/kwh for currents below 61.14a ; 230v 50% duty cycle 1600 imp/kwh for currents above 61.14a ; 230v 80 ms 3200 imp/kwh for currents below 30.57a ; 230v 50% duty cycle 3200 imp/kwh for currents above 30.57a ; 230v 50% duty cycle 3200 imp/kwh for currents above 61.14a ; 230v 80 ms 6400 imp/kwh for currents below 15.28a ; 230v 50% duty cycle 6400 imp/kwh for currents above 15.28a ; 230v 50% duty cycle 6400 imp/kwh for currents above 30.57a ; 230v 50% duty cycle 6400 imp/kwh for currents above 61.14a ; 230v
data sheet as8118 revision 1.8, 15-feb-05 page 11 of 30 direction input (diri) the direction input pin (diri) is used to program the as8118 for either bi-directional energy measurement, or unidirectional measurement. bi-directional measurement mode ensures that all energy is measured regardless of the direction of the current through the current sensor. in unidirectional energy measurement mode, all negative going energy is suppressed and thus excluded from the accumulated energy value. the programming conditions for the diri pin are given below: diri pin mode 0 unidirectional 1 bi-directional the default condition, when the diri pin is not connected is bi-directional energy measurement, as the diri pin has an on- chip pull-up resistor. direction output (diro) the direction output pin (diro) is a logic output providing information on the direction of the current flow through the curren t sensor. the diro output may be used to directly drive an led to indicate a reversal in the direction of current flow. the timing diagram below demonstrates the operation of the diro output and the pulse outputs (mop/mon, cal and led) relative to the sign of the measured energy and the setting of the diri input. for illustration purposes, the timing diagram below only shows the led output. vp ip diri led diro 1 4 3 2 figure 5 timing diagram for the diri and diro functions the timing diagram above demonstrates the state of both the led and diro output pins depending on the input conditions: 1. the voltage input (vp) and current input (ip) are in phase and the direction input diri is set to ?unidirectional? mode. pulses are available at the led output and diro indicates a positive energy flow.
data sheet as8118 revision 1.8, 15-feb-05 page 12 of 30 2. the voltage input (vp) and current input (ip) are in phase and the direction input diri is set to ?bidirectional? mode. pulses are available at the led output and diro indicates a positive energy flow. 3. the voltage input (vp) and current input (ip) are out of phase and the direction input diri is set to ?unidirectional? mode. pulses are no longer available at the led output as negative going energy is not measured. the direction output diro indicates a change in direction of the input current at ip. 4. the voltage input (vp) and current input (ip) are out of phase. the direction input diri is set to ?bidirectional? mode. pulses are again available at the led output and the direction output diro indicates a change in direction of the input current at ip. crystal oscillator the as8118 has an on-chip crystal oscillator, with the recommended 3.5795mhz crystal connected to the xin (crystal input) and xout (crystal output) pins. the 3.5795mhz crystal is recommended, as it is a standard low cost component. alternatively, an external clock signal may be applied to xin. in this case, xout should not be connected. test mode (tm) on ?power up?, the test mode input defines the mode of operation of the device. either ?normal operation?, or ?programming? modes may be selected. tm has an on-chip pull down resistor and should be left unconnected during ?normal operation?. tm must be set to logic ?1? at ?power up? to set device in ?programming? mode. the as8118 programming procedure is defined in detail in the following paragraphs. power supply monitor the as8118 has an on-chip power supply monitor (psm) which resets the complete device once the supply voltage drops below the specified threshold of 3.5v 5%. programming the as8118 the as8118 is a programmable device, which uses on-chip zener diodes to permanently program specific data such as current input channel gain, pulse-level, meter constant settings and system calibration. this programming operation is also called ?burn? which relates to the permanent physical change of the on-chip zener diodes electrical behavior. another term for ?permanent programming? is otp (one-time-programming). two banks of zener diodes are available in the as8118 in order to allow a second calibration. by programming the 2nd bank of zener diodes, this bank will subsequently be used (bank-select-bit). during power-up of as8118, a readout of all zener diodes occurs and the data of the active bank is used. the as8118 may also be used with the default operating parameters, which have been defined earlier in this document. if the user wishes to alter the operating parameters, the as8118 may simply be programmed to provide the required operating parameters. fast meter system calibration may also be carried out as part of the as8118 programming procedure, providing long term meter system stability. the as8118 can be operated in one of two modes. the two modes are: - normal operation mode: normal operation is the mode in which the device operates to perform the kwh metering function, for which the device is designed. - programming mode: programming is the mode in which the as8118 is set to perform the programming operations. when in programming mode, two different operations may be carried out:
data sheet as8118 revision 1.8, 15-feb-05 page 13 of 30 - test write: test write enables the writing of data to a register in the device and for the resultant chip behaviour to be investigated, before the data is written permanently to the non-volatile prom (programmable read only memory) memory. - burn: burn is the programming cycle that ensures that the required data is permanently written to the non-volatile prom (programmable read only memory). during programming mode all pulse outputs (mop/mon, cal and led) can be accessed. the as8118 may only be set up in one of these two modes during the ?power up? cycle of the device. the mode is selected by programming the tm and diro at ?power up? as shown in the table below: mode of operation tm diro normal operation 0 x programming 1 0 note: pin diro has an on-chip internal pull-down resistor, thus the pin may be left open or tied ?low? for both normal operation and programming modes. the default mode is thus normal operation mode, with the as8118 only being set to programming mode when tm is pulled high during power up. the analog input pin prog is also required for the programming of the as8118. during test-write prog is used to transfer digital data to the internal register. during burn it is used to change the states of the internal prom cells. when in programming mode, the as8118 must be powered down before the device can enter normal operation mode. prom definition and contents the table below provides a definition of the internal prom cells. as shown, sets of prom cells form binary words, which represent, for example, a defined pulse rate. parameter description number of bits register bits settings default bank 0 bank 1 gain select current channel gain 2 [34:33] [67:66] 00 : 4 01 : 16 10 : 16 11 : 20 11 acreep_sel select anti creep threshold 2 [32:31] [65:64] 00 : 2.32ma 01 : 7.43ma 10 : 14.9ma 11 : 29.7ma 01 f_mon_sel select mop/mon pulse rate [imp/kwh] 2 [30:29] [63:62] 00 : 100 01 : 200 10 : 400 11 : 800 10 f_cal_sel select multiplier for cal pulse rate related to mop/mon pulse rate 2 [28:27] [61:60] 00 : 8 01 : 16 10 : 32 11 : 64 01
data sheet as8118 revision 1.8, 15-feb-05 page 14 of 30 parameter description number of bits register bits settings default f_led_sel select led pulse rate [imp/kwh] 3 [26:24] [59:57] 000 : 100 001 : 200 010 : 400 011 : 800 100 : 1600 101 : 3200 110 : 6400 101 pulse_lev central pulse_level value 22 [23:2] [56:35] 0x6a6d4 bank01 select prom bank 0 or 1 1[1] 0 : bank 0 1 : bank 1 0 sel_def select default or programmed values 1[0] 0 : default 1 : programmed value 0 not used 2 [69:68] 00 total 70 the ?default? values are hard coded on-chip outside the prom block. only once the sel_def bit has been set, are the prom parameters selected by the as8118. two prom banks are defined as ?bank 0? and ?bank 1?. this feature allows for a complete reprogramming cycle if necessary. the required bank is selected with the bit called bank01 . the calibration of the as8118 adjusts the specific pulse-level (pulse_lev), which defines exactly the energy level when a pulse has to be generated and presented to the output. this pulse-level is used to define a very fast internal pulse rate from which the external pulse outputs are derived. therefore, the as8118 is extremely flexible in defining pulse output rates as required for a specified kwh meter. the parameters f_mon_sel , f_cal_sel and f_led_sel are used to define the pulse rates for the pins mop/mon, cal and led. the acreep_sel bit defines the threshold for the current for when no pulses should be transmitted. calculations for calibration this paragraph describes how to successfully calibrate the as8118 device. the parameter pulse_lev is the main parameter to determine the basic internal (very fast) frequency. this frequency relates to the measured power and is the basis from which all the output pulse rates namely, mop/mon, cal and led are derived. prior to system calibration, the appropriate value for the parameter pulse_lev must be calculated to produce the required output pulse rates for mop/mon, cal and led. the calibration exercise must accommodate all system non-idealities that are present in the meter system. there are two calibration methods available to find the appropriate value of pulse_lev , namely: - defined current and calibration time method - comparison method it is also possible to perform: - calibration without on-chip programming
data sheet as8118 revision 1.8, 15-feb-05 page 15 of 30 defined current and calibration time method the as8118 generates a pulse whenever the internal energy accumulator contains a value, which is greater than a programmed threshold. this threshold is the parameter pulse_lev . this parameter depends on the basic meter properties, the mains voltage v mains and the maximum current to be measured, i max . furthermore, it is assumed that through a resistor divider v mains is scaled down to match the maximum input range of the vp input. firstly, an ideal value for pulse_lev is calculated. this is the value, which would have to be programmed into the as8118 device if the meter system was perfect. the following formula calculates this ideal value of pulse_lev : 435924 20 230 * i a * v v ) ideal ( lev _ pulse max mains = a calibration is performed to compensate for system non-idealities like resistor tolerances etc. the effect of these non- idealities is that with the ideal pulse_lev value the pulse rates will not be correct. in order to calibrate the meter, a new pulse_lev value has to be found. figure 6 shows the basic calibration setup. cal pulses from a meter built with the as8118 are counted during a defined time period tc , while an accurately defined calibration current ical , is being measured. calboard as8118 meter i cal time base t c figure 6 basic calibration setup for defined current and calibration time method again, if the system was perfect we would expect a certain number of pulses to be counted, the ideal number of pulses, ni : 1000 3600 * ical * v * tc * pr ni mains = where tc is in seconds. pr is the pulse rate on pin cal, which can be calculated from the prom parameters f_mon_sel and f_cal_sel : fcal * fmon pr = where fmon [imp/kwh] is the pulse rate selected by f_mon_sel and fcal is the multiplier selected by f_cal_sel . if pin led is used for calibration then pr is the pulse rate on pin led (selected by f_led_sel ). the corrected value for pulse_lev can now be calculated using the following formula: ni nr * ) ideal ( lev _ pulse ) corrected ( lev _ pulse = , where nr is the real number of pulses, i.e. the number of pulses counted during tc .
data sheet as8118 revision 1.8, 15-feb-05 page 16 of 30 a logical flow of the described calculations, is shown below: system properties vmains imax calibration setup ical tc system nonidealities ideal pulse_lev number of pulses to expect (ideal), ni pulse counting real number of pulses, nr correction n i nr ideal pulselev lev pulse * ) ( _ = example calibrate a meter with v mains = 230v, i max = 40a and ical = 10a. calibration time is 20 seconds, the prom settings for the pulse rates are: fmon: 200 imp/kwh, fcal: 64 217962 435924 40 20 230 230 = = * a a * v v ) ideal ( lev _ pulse the ideal number of pulses during 20 seconds of calibration is: imp imp . * a * v * s * * kwh / imp ni 164 56 163 1000 3600 10 230 20 64 200 = = thus 164 pulses are expected during the 20 seconds calibration time. (for this example it is not important what error is introduced with this setting!). assuming that 170 pulses were actually counted. the real pulse level may then be calculated: 225936 2 225936 164 170 217962 = = . * ) real ( lev _ pulse this pulse level must then be written to the prom so that nr equals ni. comparison method most common, is the comparison of energy reading of the meter under test against a standard or reference meter. normally, the standard, or reference meter has a considerably higher pulse rate than the meter under calibration. in this case, the absolute calibration time is not important for the calculations. the basic calibration setup is shown below:
data sheet as8118 revision 1.8, 15-feb-05 page 17 of 30 calboard reference meter as8118 meter i figure 7 basic calibration setup for comparison calibration method the standard or reference meter pulses are counted between two or more pulses from the meter to be calibrated. ideally the sum of the pulses would exactly be the ratio between standard meter pulse rate and the pulse rate of the meter under test. from the deviation the corrected pulse_lev may be calculated. nr ni * ) ideal ( lev _ pulse ) corrected ( lev _ pulse = , where nr is the number of pulses counted from the standard or reference meter and ni is the ratio between the pulse rates, which is always >1. the formula for ni is as follows: fcal * fmon ) ref ( pr ni = , this is assuming that the cal pulse output is used for calibration. if the led pulse output is used for calibration, the follow ing formula should be used: fled ) ref ( pr ni = the pulse_lev (ideal) is calculated using the following formula: 435924 20 230 * i a * v v ) ideal ( lev _ pulse max mains = it is important to note that the formula for pulse_lev (corrected) above should not be confused with the formula in the previous method of calibration for ?defined current and calibration time? method, where ni and nr are reversed. example the reference meter has a pulse rate, which is 10,000 times greater than the pulse rate of the as8118 cal output. during a calibration cycle we measure 11,000 pulses between two cal pulses. therefore the ideal pulse-level has to be changed by a factor of 10,000/11,000 = 0.909.
data sheet as8118 revision 1.8, 15-feb-05 page 18 of 30 calibration without on-chip programming it is also possible to calibrate a kwh meter using the as8118 by means of an external resistor network or trim-potentiometer. in this case, the parameters for the required pulse outputs are programmed into the device, along with the ideal value for pulse_lev as defined in the formula above. a resistor network may then be used in the voltage divider for the voltage input setting, which is then trimmed until the measured pulse rate matches the ideal pulse rate. in the case for kwh meter designs, which include a -controller and non-volatile memory, again, the parameters for the required pulse outputs are programmed into the device, along with the ideal value for pulse_lev as defined in the formula above. the calibration may then be performed in the -controller. defining the programmed word the as8118 allows for all on-chip programmable functions to be reprogrammed a second time. it is important to always use the bank ?0? as the first programming option. this is necessary as once bank ?1? has been selected and this selection has been permanently ?burned? into the as8118 device, bank ?0? can no longer be selected. when programming the as8118, the bank that is not selected should have all ?0? values as the programmed values. confirmation of this is shown in the example below, where bank ?0? has been selected for programming. all the programme bits of bank ?1? have been programmed as ?0?. important: the value of bit [0] must always be ?1? when programming the as8118, regardless of the memory bank being programmed. the bits [69:68] are not used and are thus ?don?t care? bits. the programmed value may be ?1? or ?0?. an example of the word to be programmed to the as8118 should look as follows: bit number bit value description [69:68] 00 not used bits [67:66] 00 bank 1: gain [65:64] 00 bank 1: anticreep threshold [63:62] 00 bank 1: f_mon [61:60] 00 bank 1: f_cal [59:57] 000 bank 1: f_led [56:35] 0x000000 bank 1: pulse_lev [34:33] 00 bank 0: gain = 4 (ct mode) [32:31] 01 bank 0: anticreep threshold = 7.43ma [30:29] 00 bank 0: f_mon: 100 imp/kwh [28:27] 10 bank 0: f_cal: fmon x 32 [26:24] 101 bank 0: f_led: 3200 imp/kwh [23:2] 0x06a6d4 bank 0: pulse_lev: 435924 [1] 0 select bank 0 [0] 1 select programmed values after selecting all prom parameters as required a complete 70-bit word (including two overhead bits) is formed, which must be written to the prom.
data sheet as8118 revision 1.8, 15-feb-05 page 19 of 30 testwrite testwrite means that the word to be programmed is simply written to an on-chip shift register so that the resulting behavior of the as8118 device may be examined. once the prom word is confirmed correct, it may be burned into the device. i.e. irreversibly written to the as8118. until the data has been burned into the device, in other words, if only a testwrite procedure has been performed, the data will be lost when the supply is removed from the as8118 device. due to the respective on-chip processing it is required to testwrite the inverse of the word to be programmed. continuing with the above example the word defined in the example should be as follows: 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 1111111111111111111 50 ? 34333231302928272625242322212019 1 ? 1110110101011100 1817161514131211109876543210 1010110010010101110 the testwrite procedure is carried out as described in the following timing diagram: tm diro prog 69 68 67 4 3 0 1 2 startup define testwrite mode xh x l h f1 t2 t3 imax: 500 a start testwrite (diro=0) high low high low 3v-3.5v 0v h h l note: high and low refers to vdd and vss respectively. on the first falling tm edge the mode (testwrite) is defined. on the next rising tm edge the procedure is started. afterwards 70 clocks have to be sent to diro. as can be seen the logic level on prog prior to the positive diro edges defines the state to be shifted into the internal register. important timing parameters are: f1: maximum frequency, must not exceed 50khz t2: data setup time, minimum is 100ns t3: data storage time: the programmed bit is stored after approximately 20ns burn the burn procedure irreversibly writes data to the prom. to do this, the 1s in the original word to be programmed must be burned.
data sheet as8118 revision 1.8, 15-feb-05 page 20 of 30 continuing with the above example, the defined word to be burned will be as follows: 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 0000000000000000000 50 ? 34333231302928272625242322212019 0 ? 0001001010100011 1817161514131211109876543210 0101001101101010001 the following timing diagram shows how the burn procedure is carried out: tm diro prog 69 68 67 4 0 1 2 startup define burn mode xl l x l f1 t2 t3 start burn (diro=1) high low high low vburn 0v lh t1 3 h note: high and low refers to vdd and vss respectively. the first falling and rising edges on tm define the burn mode and starts it (as can be seen diro must be set to logic ?high? at the falling edge, but must be low at the rising edge). then the first prom cell is selected. after each rising clock edge on diro the next prom cell is selected going from msb to lsb. while one of the prom cells is selected a defined (low-active) pulse on tm must be applied to ?burn? the respective prom cell, i.e. write a permanent logic-1 to it. important specifications are: tburn: temperature during burn cycle: 25c 10c vburn: 7.50 0.25v (at the as8118 prog pin) f1: maximum diro clock frequency is 100khz t1: the burn pulse must have a delay of at least 1s after the previous positive diro clock edge t2: after one burn pulse there must be a delay of at least 1s before the next prom cell is selected t3: the burn pulse width is defined to be 1.0 0.2s. the rise and fall time of the burn pulses on tm must be less than 50ns. after a burn cycle has been completed, a read cycle must be initiated so that the actual data is loaded. (after ?burn? the data in the internal register is inverted!) read the conditions for ?burn? are specified very tightly. in order to be certain that the ?burn? process was successful this proces s has to be verified. there are 2 modes of readout, a digital readout and analog readout.
data sheet as8118 revision 1.8, 15-feb-05 page 21 of 30 digital readout uses the threshold of the comparator internal to the as8118. thus, the result, which can be observed on the cal pin, is the same as that used internally by the as8118. digital readout does not allow the quality of the ?burn? to be evaluated. analog readout does allow for the verification of the analog value of the zener diodes. with analog readout, the quality of the ?burn? can be verified. in order to verify the ?burn? process, an ?analog readout? of the zener diodes voltages has to be performed as the last step after calibration. this can be done during the ?read? process, which may be started during calibration mode. the goal is to verify that burned diodes show a voltage level of not more than 0.5v during the analog readout and the ?unburned? diodes a voltage level of more than 2.4v. digital readout the as8118 offers the customer the ability to read the prom data. for example, it may be necessary to examine if a device has been calibrated already and what value is correctly stored in the prom. for the read mode the same two digital inputs (tm and diro) are used as for ?testwrite? and ?burn?. as can be seen in the following timing diagram the read mode is selected by setting diro=1 while there is a rising edge on tm. (this assumes that one of the 3 modes has been completed or the chip has just been powered up, i.e. the chip expects to enter a new mode.) the following timing diagram shows the digital readout of the zener diodes: tm diro prog 69 68 67 66 0 1 2 define read mode f1 t2 t3 (diro=1) high low high low high cal high low end read low note: 1. high and low refers to vdd and vss respectively. 2. in this case, the term ?digital? means that there is an on-chip comparator, which decides on the values of the bits, 0 or 1, relative to a certain threshold; it neither guarantees the burned zener diodes voltage level to be below 0.5v (zv b ) nor a value for unburned zener diodes of higher than 2.4v (zv ub ) as shown in the operating conditions. after starting read mode with each rising edge on diro one of the prom cells is selected. its content is stored in a separate internal flip-flop, the output of which can be watched on pin cal (only during read!). with one additional rising edge on tm the read mode is left and pin cal shows the normal pulse output again. important: the bits displayed on cal are the inverse of the prom contents, i.e. they have to be inverted to match with the previous prom contents table. important timings are: f1: maximum read frequency, for reliable reading this should not be higher than 100khz. t2: delay between the two rising edges: >100ns t3: depending on the loading on pin cal the delay between rising edge on tm and change of data on cal may vary. a typical value is 50 ns.
data sheet as8118 revision 1.8, 15-feb-05 page 22 of 30 analog readout the analog readout can be performed by disconnecting the prog pin from the calibration board and starting a ?read? sequence. at specific points in time the voltage level on the prog pin must be sampled. these time points are shown in the following timing diagram. tm diro prog 69 68 67 66 0 1 2 high low high low cal high low end read measure zener diode voltage: 69 68 67 66 65 0 5v 2.4v 0.5v the numbers at the bottom of this timing diagram indicate the sample points of the bits in the prom table, at which the zener diode voltage level can be measured and compared against the limits for burned and unburned zener diodes. in general this readout is most important, when a new calibration system is installed. variations on the burn voltage or even the length of the cable connected to the as8118 prog pin may have an influence on the quality of the burn process.
data sheet as8118 revision 1.8, 15-feb-05 page 23 of 30 application circuit c6 r7 c8 c7 var d1 nl vi vo gnd ic1 d2 as8118 1 9 8 7 6 5 4 3 2 10 16 15 14 13 12 11 18 17 1 3 2 r2 r1a r1b c1 c13 c14 c2 r3 c3 r4 shunt load c12 c9 c11 c10 xtal vdd power in led gnd prog diro cal mop mon + + + vdd vdd c4 r5 c5 r6 note: 1. there must be proper ground connection between the calibration hardware and the meter under calibration during ?calibration mode?. this ensures that the programming procedure is not effected by spurious signals. such spurious signals could originate from load switching during calibration. 2. when using a low resistance shunt for current sensing, a small parasitic inductance introduced by the shunt can have negative effects on the measurement accuracy. the filters on the current inputs designated by the components r5, c5 and r6, c4 provide a cancellation effect on the parasitic shunt inductance. the filters assume a typical inductance of between 1nh and 2nh.
data sheet as8118 revision 1.8, 15-feb-05 page 24 of 30 parts list designation value unit description as8118 single phase average energy metering ic rshunt 300 ohm precision resistor, 5% r1a 820 kohm resistor, 0.6w, 10% r1b 750 kohm resistor, 0.6w, 10% r2 820 ohm smd resistor, 1% r3, r4, r5, r6 680 ohm smd resistor, 1% r7 470 ohm resistor, 1w, 5% c1 68 nf smd capacitor, 5% c2, c3, c4, c5 33 nf smd capacitor, 5% c6 10 nf capacitor (polypropylene), 1000vdc/250vac, 10% c7 470 nf capacitor (polypropylene), 1000vdc/250vac, 10% c8 470 f capacitor (electrolytic), 20% c9, c10 100 nf smd capacitor, 5% c11 10 f capacitor (electrolytic) , 10% c12 220 f capacitor (electrolytic) , 20% c13, c14 100 nf smd capacitor, 10% ic1 lm78l05 voltage regulator, 5% xtal 3.579545 mhz quartz crystal or ceramic resonator, 20ppm/k d1 bzv85-c15 zener diode, 1.3w, 15v, 5% d2 1n4007 diode var s20k275 varistor, v rms = 275v, v dc = 350v
data sheet as8118 revision 1.8, 15-feb-05 page 25 of 30 electrical characteristics absolute maximum ratings * parameter symbol min max unit note dc supply voltage vdd -0.3 7.0 v input pin voltage vin -0.3 vdd + 0.3 v input current on any pin iin -100 +100 ma 25c storage temperature tstrg -65 +150 c humidity noncondensing h 5 85 % electrostatic discharge 1000 v 1) lead temperature c 2) 1) mil std883 method 3015.7 ?human body model? (r = 1.5k ? ; c = 100pf) 2) iec61760-1, soldering conditions * stresses above those listed may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability (eq. hot carrier degradation). operating conditions parameter symbol min typ max unit note positive analog supply voltage avdd 4.5 5.0 5.5 v referred to avss typical 10% negative analog supply voltage avss 0 v difference of supply a - d -0.1 0.1 v avdd ? dvdd avss ? dvss positive digital supply voltage dvdd 4.5 5.0 5.5 v referred to dvss typical 10% negative digital supply voltage dvss 0 v supply current isupp 4 ma ambient temperature tamb -40 25 85 c measured frequency fmeas 45 65 hz system clock frequency fclk 3.56 3.58 3.60 mhz variations result in gain errors which are calibrated out measurement bandwidth bw 870 hz prom zener voltage unburned zv ub 2.4 v measured during analog readout prom zener voltage burned zv b 0.5 v measured during analog readout
data sheet as8118 revision 1.8, 15-feb-05 page 26 of 30 dc characteristics digital input with pull-down (tm) parameter min max note vih 0.7 * vdd vil 0.3 * vdd iih 30 a 160 a di, cmos w/pull-down (1) iil na na di, cmos w/pull-down 1) iih tested at vdd = 5.5v and vin = 5.5v digital input with pull-up (diri) parameter min max note vih 0.7 * vdd vil 0.3 * vdd iih na na di, cmos w/pull-up (2) iil 30 a 160 a di, cmos w/pull-up 2) iil tested at vdd = 5.5v and vin = 0v digital input/output with pull-down (diro, cal) parameter min max note input vih 0.7 * vdd vil 0.3 * vdd iih 30 a 160 a(1) iil na na di, cmos w/pull-down output voh 4.0v ioh = -4ma vol 0.4v iol = 4ma 1) iih is tested at vdd = 5.5v and vin = 5.5v digital output (mon, mop, led) parameter min max note voh 4.0v ioh = -10ma vol 0.4v iol = 10ma
data sheet as8118 revision 1.8, 15-feb-05 page 27 of 30 package dimensions pdip-18 0.900 (18 lead) 0.756 (16 lead) (all dimensions in inch) soic-18 parting line detail a .013 .018 .034 .040 .018 .024 l 45 end view h x 45 see detail a c a 2 side view seating plane a 1 d e b a top view h x 45 h e .045 .055 .040 .050 dia. .035 .045 (all dimensions in inch) common dimensions symbol min nom max note a .097 .101 .104 a 1 .0050 .009 .0115 a 2 .090 .092 .094 b .014 .016 .019 c .0091 .010 .0125 d see variations 3 e .292 .296 .299 e .050 h .400 .406 .410 h .010 .013 .016 l .024 .032 .040 n see variations 5 0 5 8 x .085 .093 .100 variations note 3 (d) note 5 symbol min nom max (n) aa .402 .407 .412 16 ab .451 .456 .461 18 ac .500 .505 .510 20 ad .602 .607 .612 24 ae .701 .706 .711 28 ordering information part number package AS8118D18 dip-18 as8118s18 soic-18 as8118 evaluation kit dip-18
data sheet as8118 revision 1.8, 15-feb-05 page 28 of 30 copyright copyright ? 1997-2004, austriamicrosystems ag, schloss premstaetten, 8141 unterpremstaetten, austria - europe. trademarks registered ? . all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. disclaimer devices sold by austriamicrosystems ag are covered by the warranty and patent indemnification provisions appearing in its terms of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems ag reserves the right to change specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems ag for current information. this product is intended for use in normal commercial applications. applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifi cally not recommended without additional processing by austriamicrosystems ag for each application. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services.
data sheet as8118 revision 1.8, 15-feb-05 page 29 of 30 note:
data sheet as8118 revision 1.8, 15-feb-05 page 30 of 30 contact headquarters austriamicrosystems ag a 8141 schloss premstaetten, austria phone: +43 3136 500 0 fax: +43 3136 525 01 info@austriamicrosystems.com sales offices austriamicrosystem s germany gmbh tegernseer landstrasse 85 d 81539 mnchen, germany phone: +49 89 69 36 43 0 fax : +49 89 69 36 43 66 austriamicrosystems ag klaavuntie 9 g 55 fi 00910 helsinki, finland phone: +358 9 72688 170 fax: +358 9 72688 171 austriamicrosystems france s.a.r.l. 124, avenue de paris f 94300 vincennes, france phone: +33 1 43 74 00 90 fax : +33 1 43 74 20 98 austriamicrosystems ag biv?gen 3b s 19163 sollentuna, sweden phone: +46 8 6231 710 austriamicrosystems switzerland ag rietstrasse 4 ch 8640 rapperswil, switzerland phone: +41 55 220 9008 fax : +41 55 220 9001 austriamicrosystems ag 88, barkham ride, finchampstead, wokingham, berkshire rg40 4et, united kingdom phone: +44 118 973 1797 fax: +44 118 973 5117 austriamicrosystems usa, inc. 8601 six forks road suite 400 raleigh, nc 27615, usa phone: +1 919 676 5292 fax : +1 509 696 2713 austriamicrosystems ag suite 915, no. 1, suhua road, suzhou industrial park, pr china 215021 phone: +86 512 6762 2590 (6762 2593) fax: +86 512 6762 2594 austriamicrosystems ag suite 811, tsimshatsui centre, east wing, 66 mody road, tsim sha tsui east, kowloon, hong kong phone: +852 2268 6899 fax: +852 2268 6799 austriamicrosystems japan, ag aios gotanda annex 5 th fl., 1-7-11, higashi-gotanda, shinagawa-ku, tokyo 141-0022, japan phone: +81 3 5792 4975 fax : +81 3 5792 4976 austriamicrosystems ag #805, dong kyung bldg., 824-19, yeok sam dong, kang nam gu, seoul korea 135-080 phones: +82 2 557 8776 fax: +82 2 569 9823 austriamicrosystems ag 83, clemenceau avenue, #02-01, ue square, singapore 239920 phone: +65 6 830 8305 fax: +65 6 234 3120 austriamicrosystems ag 2 nd floor, no. 31, sec. 2 nam-chang road, taipei, taiwan phone: +886 2 2395 6600 227 fax: +886 2 2395 7330

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